TWorkloadCondition.TWorkloadConditionTupleScheme

ElementMissed InstructionsCov.Missed BranchesCov.MissedCxtyMissedLinesMissedMethods
Total96 of 960%18 of 180%1111282822
write(TProtocol, TWorkloadCondition)530%120%77161611
read(TProtocol, TWorkloadCondition)430%60%44121211