/root/doris/be/src/util/cpu_info.h
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1 | | // Licensed to the Apache Software Foundation (ASF) under one |
2 | | // or more contributor license agreements. See the NOTICE file |
3 | | // distributed with this work for additional information |
4 | | // regarding copyright ownership. The ASF licenses this file |
5 | | // to you under the Apache License, Version 2.0 (the |
6 | | // "License"); you may not use this file except in compliance |
7 | | // with the License. You may obtain a copy of the License at |
8 | | // |
9 | | // http://www.apache.org/licenses/LICENSE-2.0 |
10 | | // |
11 | | // Unless required by applicable law or agreed to in writing, |
12 | | // software distributed under the License is distributed on an |
13 | | // "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY |
14 | | // KIND, either express or implied. See the License for the |
15 | | // specific language governing permissions and limitations |
16 | | // under the License. |
17 | | // This file is copied from |
18 | | // https://github.com/apache/impala/blob/branch-2.9.0/be/src/util/cpu-info.h |
19 | | // and modified by Doris |
20 | | |
21 | | #pragma once |
22 | | |
23 | | #include <glog/logging.h> |
24 | | #include <stdint.h> |
25 | | |
26 | | #include <memory> |
27 | | #include <string> |
28 | | #include <vector> |
29 | | |
30 | | namespace doris { |
31 | | |
32 | | /// CpuInfo is an interface to query for cpu information at runtime. The caller can |
33 | | /// ask for the sizes of the caches and what hardware features are supported. |
34 | | /// On Linux, this information is pulled from a couple of sys files (/proc/cpuinfo and |
35 | | /// /sys/devices) |
36 | | class CpuInfo { |
37 | | public: |
38 | | static const int64_t SSSE3 = (1 << 1); |
39 | | static const int64_t SSE4_1 = (1 << 2); |
40 | | static const int64_t SSE4_2 = (1 << 3); |
41 | | static const int64_t POPCNT = (1 << 4); |
42 | | static const int64_t AVX = (1 << 5); |
43 | | static const int64_t AVX2 = (1 << 6); |
44 | | |
45 | | /// Cache enums for L1 (data), L2 and L3 |
46 | | enum CacheLevel { |
47 | | L1_CACHE = 0, |
48 | | L2_CACHE = 1, |
49 | | L3_CACHE = 2, |
50 | | }; |
51 | | static const int NUM_CACHE_LEVELS = L3_CACHE + 1; |
52 | | |
53 | | /// Initialize CpuInfo. |
54 | | static void init(); |
55 | | |
56 | | /// Determine if the CPU meets the minimum CPU requirements and if not, log an error. |
57 | | static void verify_cpu_requirements(); |
58 | | |
59 | | /// Determine if the CPU scaling governor is set to 'performance' and if not, issue an |
60 | | /// error. |
61 | | static void verify_performance_governor(); |
62 | | |
63 | | /// Determine if CPU turbo is disabled and if not, issue an error. |
64 | | static void verify_turbo_disabled(); |
65 | | |
66 | | /// Returns all the flags for this cpu |
67 | 0 | static int64_t hardware_flags() { |
68 | 0 | DCHECK(initialized_); |
69 | 0 | return hardware_flags_; |
70 | 0 | } |
71 | | |
72 | | /// Returns whether of not the cpu supports this flag |
73 | 744 | inline static bool is_supported(long flag) { |
74 | 744 | DCHECK(initialized_); |
75 | 744 | return (hardware_flags_ & flag) != 0; |
76 | 744 | } |
77 | | |
78 | | /// Toggle a hardware feature on and off. It is not valid to turn on a feature |
79 | | /// that the underlying hardware cannot support. This is useful for testing. |
80 | | static void enable_feature(long flag, bool enable); |
81 | | |
82 | | /// Returns the number of cpu cycles per millisecond |
83 | 0 | static int64_t cycles_per_ms() { |
84 | 0 | DCHECK(initialized_); |
85 | 0 | return cycles_per_ms_; |
86 | 0 | } |
87 | | |
88 | | /// Returns the number of cores (including hyper-threaded) on this machine that are |
89 | | /// available for use by Impala (either the number of online cores or the value of |
90 | | /// the --num_cores command-line flag). |
91 | | static int num_cores() { |
92 | | DCHECK(initialized_); |
93 | | return num_cores_; |
94 | | } |
95 | | |
96 | | /// Returns the maximum number of cores that will be online in the system, including |
97 | | /// any offline cores or cores that could be added via hot-plugging. |
98 | 0 | static int get_max_num_cores() { return max_num_cores_; } |
99 | | |
100 | | /// Returns the core that the current thread is running on. Always in range |
101 | | /// [0, GetMaxNumCores()). Note that the thread may be migrated to a different core |
102 | | /// at any time by the scheduler, so the caller should not assume the answer will |
103 | | /// remain stable. |
104 | | static int get_current_core(); |
105 | | |
106 | | /// Returns the maximum number of NUMA nodes that will be online in the system, |
107 | | /// including any that may be offline or disabled. |
108 | 0 | static int get_max_num_numa_nodes() { return max_num_numa_nodes_; } |
109 | | |
110 | | /// Returns the NUMA node of the core provided. 'core' must be in the range |
111 | | /// [0, GetMaxNumCores()). |
112 | 0 | static int get_numa_node_of_core(int core) { |
113 | 0 | DCHECK_LE(0, core); |
114 | 0 | DCHECK_LT(core, max_num_cores_); |
115 | 0 | return core_to_numa_node_[core]; |
116 | 0 | } |
117 | | |
118 | | /// Returns the cores in a NUMA node. 'node' must be in the range |
119 | | /// [0, GetMaxNumNumaNodes()). |
120 | 0 | static const std::vector<int>& get_cores_of_numa_node(int node) { |
121 | 0 | DCHECK_LE(0, node); |
122 | 0 | DCHECK_LT(node, max_num_numa_nodes_); |
123 | 0 | return numa_node_to_cores_[node]; |
124 | 0 | } |
125 | | |
126 | | /// Returns the cores in the same NUMA node as 'core'. 'core' must be in the range |
127 | | /// [0, GetMaxNumCores()). |
128 | 0 | static const std::vector<int>& get_cores_of_same_numa_node(int core) { |
129 | 0 | DCHECK_LE(0, core); |
130 | 0 | DCHECK_LT(core, max_num_cores_); |
131 | 0 | return get_cores_of_numa_node(get_numa_node_of_core(core)); |
132 | 0 | } |
133 | | |
134 | | /// Returns the index of the given core within the vector returned by |
135 | | /// GetCoresOfNumaNode() and GetCoresOfSameNumaNode(). 'core' must be in the range |
136 | | /// [0, GetMaxNumCores()). |
137 | 0 | static int get_numa_node_core_idx(int core) { |
138 | 0 | DCHECK_LE(0, core); |
139 | 0 | DCHECK_LT(core, max_num_cores_); |
140 | 0 | return numa_node_core_idx_[core]; |
141 | 0 | } |
142 | | |
143 | | /// Returns the model name of the cpu (e.g. Intel i7-2600) |
144 | 0 | static std::string model_name() { |
145 | 0 | DCHECK(initialized_); |
146 | 0 | return model_name_; |
147 | 0 | } |
148 | | |
149 | | static std::string debug_string(); |
150 | | |
151 | | /// A utility class for temporarily disabling CPU features. Usage: |
152 | | /// |
153 | | /// { |
154 | | /// CpuInfo::TempDisable disabler(CpuInfo::AVX2); |
155 | | /// // On the previous line, the constructor disables AVX2 instructions. On the next |
156 | | /// // line, CpuInfo::IsSupported(CpuInfo::AVX2) will return false. |
157 | | /// SomeOperation(); |
158 | | /// // On the next line, the block closes, 'disabler's destructor runs, and AVX2 |
159 | | /// // instructions are re-enabled. |
160 | | /// } |
161 | | /// |
162 | | /// TempDisable's destructor never re-enables features that were not enabled when then |
163 | | /// constructor ran. |
164 | | struct TempDisable { |
165 | | TempDisable(int64_t feature) |
166 | 0 | : feature_(feature), reenable_(CpuInfo::is_supported(feature)) { |
167 | 0 | CpuInfo::enable_feature(feature_, false); |
168 | 0 | } |
169 | 0 | ~TempDisable() { |
170 | 0 | if (reenable_) { |
171 | 0 | CpuInfo::enable_feature(feature_, true); |
172 | 0 | } |
173 | 0 | } |
174 | | |
175 | | private: |
176 | | int64_t feature_; |
177 | | bool reenable_; |
178 | | }; |
179 | | |
180 | | protected: |
181 | | friend class CpuTestUtil; |
182 | | |
183 | | /// Setup fake NUMA info to simulate NUMA for backend tests. Sets up CpuInfo to |
184 | | /// simulate 'max_num_numa_nodes' with 'core_to_numa_node' specifying the NUMA node |
185 | | /// of each core in [0, GetMaxNumCores()). |
186 | | static void _init_fake_numa_for_test(int max_num_numa_nodes, |
187 | | const std::vector<int>& core_to_numa_node); |
188 | | |
189 | | private: |
190 | | /// Initialize NUMA-related state - called from Init(); |
191 | | static void _init_numa(); |
192 | | |
193 | | /// Initialize 'numa_node_to_cores_' based on 'max_num_numa_nodes_' and |
194 | | /// 'core_to_numa_node_'. Called from InitNuma(); |
195 | | static void _init_numa_node_to_cores(); |
196 | | |
197 | | /// Populates the arguments with information about this machine's caches. |
198 | | /// The values returned are not reliable in some environments, e.g. RHEL5 on EC2, so |
199 | | /// so we will keep this as a private method. |
200 | | static void _get_cache_info(long cache_sizes[NUM_CACHE_LEVELS], |
201 | | long cache_line_sizes[NUM_CACHE_LEVELS]); |
202 | | |
203 | | static bool initialized_; |
204 | | static int64_t hardware_flags_; |
205 | | static int64_t original_hardware_flags_; |
206 | | static int64_t cycles_per_ms_; |
207 | | static int num_cores_; |
208 | | static int max_num_cores_; |
209 | | static std::string model_name_; |
210 | | |
211 | | /// Maximum possible number of NUMA nodes. |
212 | | static int max_num_numa_nodes_; |
213 | | |
214 | | /// Array with 'max_num_cores_' entries, each of which is the NUMA node of that core. |
215 | | static std::unique_ptr<int[]> core_to_numa_node_; |
216 | | |
217 | | /// Vector with 'max_num_numa_nodes_' entries, each of which is a vector of the cores |
218 | | /// belonging to that NUMA node. |
219 | | static std::vector<std::vector<int>> numa_node_to_cores_; |
220 | | |
221 | | /// Array with 'max_num_cores_' entries, each of which is the index of that core in its |
222 | | /// NUMA node. |
223 | | static std::vector<int> numa_node_core_idx_; |
224 | | }; |
225 | | } // namespace doris |